Compiling Second-Order Accelerate Programs to First-Order TensorFlow Graphs

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Document Type

Master Thesis

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CC-BY-NC-ND

Abstract

Hardware acceleration is the method of accelerating calculations with hardware specifically designed for the type of calculations. Accelerate and TensorFlow are libraries that make this accessible to many programmers, but these libraries differ in the level of abstraction and targeted hardware. This thesis investigates the possibility of compiling and executing Accelerate programs in TensorFlow. A compiler is introduced that converts second-order Accelerate programs to first-order TensorFlow graphs, covering 68% of the Accelerate language.

Keywords

accelerate;tensorflow;hardware acceleration;compilation

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